The features, aspects and embodiments disclosed herein relate to the manufacture of semiconductor devices, such as semiconductor-on-insulator (SOI) structures, using an improved multiple ion implantation process.
To date, the semiconductor material most commonly used in semiconductor-on-insulator structures has been silicon. Such structures have been referred to in the literature as silicon-on-insulator structures and the abbreviation “SOI” has been applied to such structures. SOI technology is becoming increasingly important for high performance thin film transistors, solar cells, thermo-electric conversion devices, and displays, such as active matrix displays. SOI structures may include a thin layer of substantially single crystal silicon on an insulating material.
Various ways of obtaining SOI structures include epitaxial growth of silicon (Si) on lattice matched substrates. An alternative process includes the bonding of a single crystal silicon wafer to another silicon wafer on which an oxide layer of SiO2 has been grown, followed by polishing or etching of the top wafer down to, for example, a 0.05 to 0.3 micron layer of single crystal silicon. Further methods include ion-implantation methods in which either hydrogen or oxygen ions are implanted either to form a buried oxide layer in the silicon wafer topped by Si in the case of oxygen ion implantation or to separate (exfoliate) a thin Si layer to bond to another Si wafer with an oxide layer as in the case of hydrogen ion implantation.
Manufacture of SOI structures by these methods is costly. The latter method involving hydrogen ion implantation has received some attention and has been considered advantageous over the former methods because the implantation energies required are less than 50% of that of oxygen ion implants and the dosage required is two orders of magnitude lower.
U.S. Pat. No. 7,176,528 discloses a process that produces silicon on glass (SiOG) structure. The steps include: (i) exposing a silicon wafer surface to hydrogen ion implantation to create a bonding surface; (ii) bringing the bonding surface of the wafer into contact with a glass substrate; (iii) applying pressure, temperature and voltage to the wafer and the glass substrate to facilitate bonding therebetween; (iv) cooling the structure to a common temperature; and (v) separating the glass substrate and a thin layer of silicon from the silicon wafer.
Although the manufacturing processes for making SOI structures is maturing, the commercial viability and/or application of final products employing them is limited by cost concerns. A significant cost in producing an SOI structure using the process disclosed in U.S. Pat. No. 7,176,528 is incurred during the ion implantation step. It is believed that reductions in the cost of carrying out the ion implantation process would improve the commercial application of SOI structures. Accordingly, it is desirable to continue to advance the efficiency of producing SOI structures.
Among the areas of the ion implantation process where costs are excessively high, include the resources required to prepare, and make operational, the sources of ions and the tools used for implantation. For example, when ion plasmas are employed to source ions for implantation, some type of plasma generator is required, such as an arc chamber or the like. Significant resources (time, personnel, and money) are required to make an arc chamber ready and operational. In addition, there are significant costs associated with making the semiconductor wafer (the work piece to be implanted with ions) ready to receive the ions. For example, some type of atmospheric control chamber (often called an end station) is usually employed to establish desirable conditions for implantation. These conditions may include carefully controlling vacuum, temperature, humidity, cleanliness, etc. within the chamber. Again, significant resources (time, personnel, and money) are required to make the end station ready and operational for a given ion implantation process.
The above cost issues are exacerbated when one is interested in implanting more than one species of ion into a given semiconductor wafer. Indeed, one prior art approach to multiple ion species implantation is to use a single machine approach (a single implanter set up with a single ion source) to implant one species of ion at a time. This typically involves setting up the source, accelerator equipment, and end station for one species of ion, implanting that species, and then ramping down the set up, and repeating the setup for the next species of ions. While the end station set up may remain through the transition of ion species, the transition of the ion source (including clearing the memory effect) from one species to another is very time consuming and costly.
An alternative system may employ a dual machine approach (two separate implanters, each with a dedicated ion source) to implant one species of ion at a time. This typically involves setting up both sources and accelerator equipment for both species of ion. The semiconductor wafer is placed in one of the end stations, brought to the proper atmospheric conditions, and one of the ion species is implanted. Then the semiconductor wafer is brought back to ambient conditions, transferred to the other end station, and brought back to the proper atmospheric conditions for the implantation of the second ion species. Thus, while the delays associated with transitioning a single source is reduced or eliminated, the cycling of the semiconductor wafer through two different end stations is time consuming and costly. Since transport between two end stations is required, the possibility of substrate contamination is also significantly higher in the dual machine approach.
Therefore, irrespective of which approach is employed (single or dual machine), the costs associated with preparing, and making operational, the ion sources and/or end stations used during the multiple ion species implantation processes are excessive.
There have been advancements made to the prior art approach to implanting more than one species of ion into a given semiconductor wafer. For example, one new approach is to implant both species of ions into the semiconductor wafer simultaneously. Details of this approach may be found in co-owned and co-pending U.S. Ser. No. 12/709,833, filed Feb. 2, 2010, entitled SEMICONDUCTOR STRUCTURE MADE USING IMPROVED ION IMPLANTATION PROCESS, the entire disclosure of which is incorporated herein in its entirety. While this new approach is very promising, additional research and advancements have been made, which are believed to provide reasonable alternatives, if not significant advantages, over the foregoing processes.